Method of manufacturing a plurality of assemblies

ABSTRACT

A plurality of assemblies is manufactured. Each assembly comprises a sealing slice that is fixed to a base slice. The plurality of assemblies is manufactured in the following manner. In a preparation step, a stack is formed. The stack comprises a plurality of pre-assemblies. Each pre-assembly comprises a base slice, a sealing slice and a fixing layer provided between the base slice and the sealing slice. The stack further comprises at least one supple buffer layer. The supple buffer layer has a mechanical rigidity, which is substantially less than that of the base slices and that of the sealing slices. The supple buffer layer thus enables to compensate for variations in thickness of the base slices and of the sealing slices. In a fixing step, the stack is pressed which causes the sealing slice of each pre-assembly to be fixed to the base-slice of the pre-assembly.

FIELD OF THE INVENTION

The invention concerns a method of manufacturing a plurality ofassemblies. An assembly comprises a sealing slice that is fixed to abase slice. The sealing slice and the base slice can be, for example,two silicon wafers.

PRIOR ART

The French patent application number 2 767 966 concerns a securedintegrated circuit device. The device includes an active layer with asemiconducting material and circuits integrated with the semiconductingmaterial. This active layer includes an active side on which there arecontact studs. An additional layer is then bonded to this active layervia an intermediate fixing layer, for example a thermosetting plastic.This fixing layer is deposited in the viscous state. Apart from itsbonding properties, it is resistant to the traditional solvents.

Generally, its properties of bonding and resistance to solvents aretemperature activated. During this activation, redundant products areformed in the intermediate fixing layer. Some redundant products areproducts resulting from various intermediate chemical reactionsoccurring, in particular, as a result of this activation. Otherredundant products are solvents, especially solvents required to ensurethat activation occurs correctly.

DESCRIPTION OF THE INVENTION

One objective of the invention is to manufacture a plurality ofassemblies with an enhanced quality.

According to one aspect of this invention, a method of manufacturing aplurality of assemblies, each assembly comprising a sealing slice thatis fixed to a base slice, the method comprising:

-   -   a preparation step, in which a stack is formed, the stack        comprising a plurality of pre-assemblies, each pre-assembly        comprising a base slice, a sealing slice and a fixing layer        provided between the base slice and the sealing slice, the stack        further comprising at least one supple buffer layer whose        mechanical rigidity is substantially less than that of the base        slices and that of the sealing slices, so as to compensate for        variations in thickness of the base slices and of the sealing        slices;    -   a fixing step, in which the stack is pressed which causes the        sealing slice of each pre-assembly to be fixed to the base-slice        of the pre-assembly.

The invention takes the following aspects into consideration. Generallythe thickness of a sealing slice and that of a base slice varies. Thisvariation of the thickness is, in particular, due to some geometricfaults and to a particular roughness of the surfaces of theses slices.When various assemblies are stacked, the effects of these geometricvariations are multiplied. The supple buffer layer ensures that thepressure exerted during the fixing step on each pre-assembly, is appliedmore uniformly thus compensating for variations in thickness of the baseslices and of the sealing slices. This allows a better fixation quality.The invention enables therefore to manufacture a plurality of assemblieswith an enhanced quality.

DRAWINGS

It will be easier to understand the invention on reading the nonlimiting description below, written with reference to the accompanyingdrawings, where:

FIG. 1 illustrates a silicon wafer;

FIG. 2 illustrates a deposition step;

FIG. 3 illustrates a positioning step;

FIG. 4 illustrates a sealing step;

FIG. 5 illustrates an advantageous variant of the sealing step; and

FIG. 6 illustrates an evacuation step.

MODE OF REALISATION OF THE INVENTION

FIG. 1 illustrates the first silicon wafer 0. This wafer includes activeelements, for example electrical circuits, and contact studs.

FIG. 2 illustrates a deposition step. In this step, an adhesive layer 2and, optionally, auxiliary layers 1 and 3 are deposited on the firstsilicon wafer 0. The auxiliary layers 1 and 3 include one or moreadhesion and impermeability agents.

The adhesive layer 2 is preferably obtained from a polyimide dispensedas an acid or ether polyamic in solution. The thickness of the adhesivelayer 2 is preferably between 2 μm and 30 μm.

The auxiliary layers 1 and 3 are preferably organosilanes. They aredeposited in liquid or viscous state in a solvated form, for example bycentrifuging. The auxiliary layers 1 and 3 are, for example, severaldozen nanometres thick. The auxiliary layers 1 and 3 are preferablyheated then cooled to improve the adhesion and impermeabilityproperties.

The assembly consisting of the first wafer 0 and the layers 1, 2 and 3deposited above is, preferably, heated. Consequently, the solventscontained in layers 1, 2 and 3 evaporate. Another advantage of thisheating is that it fastens together the first wafer 0 and the layers 1,2 and 3, making it easier to handle the assembly. The heating also helpsto adapt to the roughness due to the presence of the active elements onthe first silicon wafer 0.

FIG. 3 illustrates a positioning step in which a second silicon wafer 4is put in contact with the assembly illustrated on FIG. 2. The secondsilicon wafer 4 is pierced with through-holes 5. The positioning iscarried out so that one or more through-holes 5 are opposite the contactstuds of the first silicon wafer 0. Layers 1, 2 and 3 can also bepierced with through-holes opposite the contact studs, for example byengraving or exposure. The first silicon wafer can therefore beconnected electrically to an external element using a wire. One or moreelectrical connections can also be made between the two silicon wafers 0and 4.

The assembly formed by the first silicon wafer 0, the layers 1, 2 and 3and the second silicon wafer 4 will be referred to hereafter as thewafer assembly.

FIG. 4 illustrates a sealing step, in which the wafer assembly undergoesthe following treatment. An evacuation plate 6 is placed on the secondsilicon wafer 4.This evacuation plate is equipped with channels 7,preferably opening out on the sides of the evacuation plate 6. Theseopen channels 7 are used to evacuate the redundant products contained inthe layers 1, 2 and 3. This evacuation occurs by degassing via thethrough-holes 5 of the second silicon wafer 4.

In the sealing step, the wafer assembly is heated to evacuate theredundant products by degassing and allow chemical reactions in layers1, 2 and 3 to take place. In particular, the temperature must be greaterthan the boiling points of the solvents present in layers 1, 2 and 3 toenable their degassing. If the temperature is too high, however, thebonding properties of layers 1, 2, and 3 deteriorate. For example, ifthe layer of adhesive 2 consists of polyimide, a temperature comprisedbetween 200° C. and 400° C. is suitable ; it can be in particular 270°C. Advantageously, during this sealing step the ramp-up of thetemperature is controlled so that the degassing does not happen with atoo high degassing flux.

Pressure is applied uniformly over the wafer assembly, for example usinga press. For example, a pressure of 3 bars, applied for a period of 4hours, is suitable.

Note that the auxiliary layers 1 and 3 improve the adhesion of the layerof adhesive 2 on the silicon wafers 0 and 4.In addition, the auxiliarylayers 1 and 3 increase the impermeability of the bonding of the siliconwafers 0 and 4. The bond will therefore be less sensitive to chemicalattack, for example.

FIG. 5 illustrates the following aspect. A flexible membrane 8 withporosity and creep properties can be inserted between the second siliconwafer 4 pierced with through-holes 5 and the evacuation plate 6 equippedwith evacuation channels 7. The flexible membrane 8 is made of a porousmaterial so that the redundant products can be evacuated via theevacuation channels 7 in the evacuation plate 6 during degassing. Theporous material can be, for example, a fibrous membrane made of expandedpolytetrafluorethylene (PTFE). The water entry pressure of a membranecan be used to define the porosity of the material. We can used, forexample, a flexible membrane made of expanded PTFE whose water entrypressure is, for example greater than 0.05 bar/60 sec and, preferablygreater than 0.6 bar/60 sec. Such a flexible membrane 8 may bedistributed by the GORE company (registered trademark). Advantageously,in the case of a silicon wafer having a total thickness variation (TTV)comprised between 0.1 μm and 25 μm, a flexible membrane having athickness which is, for example, at least equal to the total thicknessvariation and which is preferably comprised between 50 μm and 2 mm, canbe used. The flexible membrane 8 thus ensures that the various pressureforces exerted during the sealing step are applied uniformly. Thisreduces the effects of any geometric faults in the silicon wafers andpossibly the effects of rough areas mainly due to the presence of activeelements. Advantageously, the flexible membrane 8 is made of a material,which does not substantially chemically react with the second siliconwafer 4, the evacuation plate 6 and the redundant products. For example,the expanded PTFE is also a material that can be advantageously used tothis purpose.

After the sealing step, redundant products still remains in the fixinglayer 2. To ensure that the bond is relatively resistant, it is best toevacuate these remaining redundant products.

FIG. 6 illustrates an evacuation step. This step is used to evacuate theremaining redundant products. In addition, it allows chemical reactionsto take place in the layer of adhesive 2, which also help to improve thebonding strength.

More precisely, FIG. 6 illustrates the heating and cooling cycles C1 andC2 of the wafer assembly. The horizontal axis represents time, thevertical axis the temperature to which the wafer assembly is exposed. Incycle C1, the temperature increases rapidly up to a sealing temperatureTs. Then the rate of temperature rise slows down considerably. This riseis interrupted by stages of constant temperature, preferably every 10°C., until it reaches a long degassing phase at constant temperature T1.The temperature then drops down to a temperature Tr, well below thesealing temperature Ts. Cycle C2 is similar to cycle C1. In cycle C2,the degassing phase takes place at a temperature T2 which is greaterthan T1 in cycle C1.

This succession of cycles causes a type of thermal pumping effect.Almost all the redundant products in the layer of adhesive 2 cantherefore be evacuated. This ensures that the bonding of the wafers isrelatively resistant.

Preferably, the sealing step and the evacuation step are carried outwith several wafer assemblies. The assemblies are simply stacked on topof each other and subjected simultaneously to the sealing step and theevacuation step. To simplify this stacking, the wafer assemblies can beindividually pre-sealed in a step introduced before the sealing step.This pre-sealing step can be carried out, for example, bythermo-compression at a relatively low temperature. A pressure of 3 barsat a temperature of 60° C. for 15 minutes gives satisfactory results.

Moreover, it is advantageous to clean the contact studs just after thepre-sealing, preferably by ionic bombardment.

When various wafer assemblies are stacked, the effects of the geometricfaults and the surface roughness are multiplied. The use of a flexiblemembrane 8 illustrated on FIG. 6 will therefore be particularlyadvantageous.

The method described previously illustrates the followingcharacteristics. A plurality of assemblies is manufactured. Eachassembly comprises a sealing slice that is fixed to a base slice. Theplurality of assemblies is manufactured in the following manner. In apreparation step, a stack is formed. The stack comprises a plurality ofpre-assemblies. Each pre-assembly comprises a base slice, a sealingslice and a fixing layer provided between the base slice and the sealingslice. The stack further comprises at least one supple buffer layer. Thesupple buffer layer has a mechanical rigidity, which is substantiallyless than that of the base slices and that of the sealing slices. Thesupple buffer layer thus enables to compensate for variations inthickness of the base slices and of the sealing slices. In a fixingstep, the stack is pressed which causes the sealing slice of eachpre-assembly to be fixed to the base-slice of the pre-assembly.

Obviously, the description of the mode of realisation described abovedoes not limit the invention, which must be understood in the broadsense.

In the above-mentioned description, a flexible fibrous membrane 8 madeof expanded PTFE has been used. Other fibrous material can also be used,for example, some fibrous composite material, in particular, a fibrouscomposite material like silicon carbon or a fibrous composite materialcomprising glass and PTFE. More generally one can use any flexiblemembrane, which is porous enough, so that redundant elements can beevacuated from the fixing layer. But the invention is not limited to thecase in which redundant elements have to be evacuated from the fixinglayer. In this case the flexible porous membrane can be replaced by anysupple buffer layer whose mechanical rigidity is substantially less thanthat of the base slices and that of the sealing slices, thus enabling tocompensate for variations in thickness of the base slices and of thesealing slices.

Advantageously, the supple buffer layer is chemically inert so that thesupple buffer layer does not substantially chemically react with a partof the assembly and, if any, with the redundant products and; also sothat the supple buffer layer can resist to the temperature appliedduring the process.

Note that the use of a supple buffer layer is not limited to the case inwhich an evacuation plate is used. For example, various wafer assembliescan be stacked without using any evacuation plate. In particular, asupple buffer layer can be inserted between a second silicon wafer of afirst assembly and the first silicon wafer of a next assembly. In thiscase, evacuation channels could be placed directly in a second siliconwafer or in a fixing layer. More generally, the invention can be appliedin the case in which no redundant elements have to be evacuated from thefixing layer. In that case, one can use any supple buffer layer whosemechanical rigidity is substantially less than that of the base slicesand that of the sealing slices, thus enabling to compensate forvariations in thickness of the base slices and of the sealing slices.

The adhesive layer 2 in the mode of realisation described previously isa polyimide. Generally, this method is suitable for any fixing layerthat can be heated so that;gas is released from the fixing layer. Thiscould be for example thermosetting plastics with creep properties andwhich are temperature stable above the temperature of decomposition ofthe active elements present in particular on the first silicon wafer.More generally one can use any fixing layer, which can be arranged tofix a base slice to a sealing slice.

In the above-mentioned description, the base-objects and the sealingobjects are silicon wafers comprising or not integrated circuits. But itcan be other objects than silicon wafers. It is, for example, possibleto replace a silicon wafer by a wafer, a slice or a substrate made of amaterial other than silicon.

In the mode of realisation described previously, the evacuation plate isequipped with open channels. More generally, one can use any evacuationdevice arranged to evacuate redundant products contained in the fixinglayer. For example, it is possible to have channels opening out directlyon a sealing-slice, thereby avoiding the need for the evacuation plateas such.

Note that the total thickness variation (TTV) of a layer is thedifference between the biggest thickness of the layer and the smallestthickness of the layer. The TTV may be, for example, due to geometricaldefaults of the layer or to the presence of specific elements.

1. A method of manufacturing a plurality of assemblies, each assemblycomprising a sealing slice that is fixed to a base slice, the methodcomprising: a preparation step, in which a stack is formed, the stackcomprising a plurality of pre-assemblies, each pre-assembly comprising abase slice, a sealing slice and a fixing layer provided between the baseslice and the sealing slice, the stack further comprising at least onesupple buffer layer whose mechanical rigidity is substantially less thanthat of the base slices and that of the sealing slices, so as tocompensate for variations in thickness of the base slices and of thesealing slices; a fixing step, in which the stack is pressed whichcauses the sealing slice of each pre-assembly to be fixed to thebase-slice of the pre-assembly.
 2. The method according to claim 1,wherein the base slice of an assembly is a semiconductor material. 3.The method according to claim 1 wherein the base slice is in the form ofa wafer comprising integrated circuits.
 4. The method according to claim1, wherein in the preparation step, an evacuation plate is placed ontothe sealing slice of a pre-assembly and wherein the supple buffer layeris placed between the sealing slice of the pre-assembly and theevacuation plate.
 5. The method according to claim 4, wherein the supplebuffer layer is made of a porous material.
 6. The method according toclaim 5, wherein the porous material is a fibrous material.
 7. Themethod according to claim 6, wherein the fibrous material comprisesexpanded PTFE.
 8. The method according to claim 5, wherein the porousmaterial has a water entry pressure, which is greater than 0.05 bar/60sec.
 9. The method according to claim 1, wherein the supple buffer layeris chemically inert.